Qualcomm SIP (System in Packaging) Packaging Engineer in Taiwan
Company:Qualcomm Semiconductor Limited
Job Area:Engineering Group, Engineering Group > ASICS Engineering
Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in.
Qualcomm Packaging group is responsible for developing and enabling new packaging technologies for high volume manufacturing. The packaging team is seeking an experienced professional who has worked with various packaging technologies Flipchip, Wirebond, CSP, WLP, PoP, etc. SIP and/or experience in automotive industry will be a plus.
Responsibilities: - Responsible from exploring, defining business justification, development and HVM deployment of SiP (System in Package) Module packaging technologies.- Responsible for defining package process flow, material set, test vehicle, DOEs, process control plans to successfully develop manufacturable and reliable SIP/Module products.- Interface with OSATs and substrate suppliers in developing technology related to SiP product requirements. Align with internal product teams.- Work with internal design team and drive DFM methodology for new technologies.- Work with internal design, modeling and procurement teams to implement technically best and lowest cost SIP options.- Technical program management to plan, execute, and monitor complex process or product developments. Regular updates on program status to management. All Qualcomm employees are expected to actively support diversity on their teams, and in the Company.
- Bachelor's degree in Engineering, Information Systems, Computer Science, or related field.- 2+ years Hardware Engineering experience or related work experience.
- Years Hardware Engineering experience or related work experience.- Years experience with semiconductor packaging, SIP/Module packaging, manufacturing process experience in - Wafer bumping, wafer handling, flipchip, wirebond, Underfill, Molding, SMT and other semiconductor packaging technologies.- Years experience working , working with OSATs, suppliers, internal design and product teams.- Years experience with in new product development in electronic packaging, exposure to - design and characterization techniques, DFM methodology, design of experiments and statistical data analysis.
Required: Bachelor's, Electrical Engineering and/or Industrial & Prod Engineering and/or Materials Science and/or Mechanical Engineering and/or Chemical EngineeringPreferred: Master's or PhD, Electrical Engineering and/or Industrial & Prod Engineering and/or Materials Science and/or Mechanical Engineering and/or Chemical Engineering
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