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Samsung Electronics America SoC Memory Subsystem Architect in San Jose, California

Position Summary

Samsung is a world leader in Memory, LCD and System LSI technologies that has the vision and commitment to invest in the future of technology – demonstrated by the $17B investment in the new 3nm Fab in Texas and the commitment to invest in dramatically expanding design activities across GPU, System IP and SoC Architecture. We are currently looking for exceptional SoC memory architects and performance modelling engineer’s to join our SoC Architecture team in our Austin, TX R & D Center (SARC), our Advanced Computing Lab (ACL) in San Jose, CA. or San Diego, CA. A wealth of growth opportunities for well qualified candidates.

Role and Responsibilities

As SoC memory subsystem architect, you will drive the definition of SoC memory and cache subsystems for next generation mobile and automotive products. This is a senior role, tasked with identifying and analyzing emerging use cases and proposing new and innovative SoC memory architectures to efficiently support them. Solid architecture foundation, detailed knowledge of cache hierarchy, memory subsystem, and SoC architecture is desired for success.

Key responsibilities include:

  • Identify and deliver new SoC memory subsystem architecture proposals for products in new and existing markets – particularly around smartphone, mobile and automotive platforms

  • Perform high-level performance modeling/simulation and analysis of memory subsystem features, applications, benchmarks, and complex uses cases. Understand and analyze the impact of system-level architectural trade-offs - Leverage a data driven approach to drive consensus around complex architectural proposals

  • Create necessary simulation/analysis tools to evaluate complex memory subsystem use cases such as gaming and camera use cases

  • Delivering architecture proposals and specifications to the design team

  • Communicate and articulate architecture proposals clearly and effectively across audiences ranging from hardware & software engineers to architecture community peers, and to technology leadership.

Minimum requirements:

  • PhD in Computer Science/Engineering in a related field or 7+ years of memory subsystem/architecture experience

  • High proficiency in architecture analysis and performance modeling, ranging from simple analytical models to complex cycle accurate performance model and correlation, especially around CPU – memory subsystems

  • Ability to leverage existing simulation capabilities or create new simulation capabilities where necessary

  • Detailed knowledge of cache subsystems including caching policies and understanding the tradeoffs of latency, bandwidth and hierarchies

  • Detailed knowledge of memory subsystem design - including existing/emerging JEDEC memory standards

  • Knowledge of in Interconnect and bus protocols – CHI/ACE interconnect experience preferred

Skills and Qualifications

Preferred candidate will possess the following:

  • Energetic, curiosity, and passion in SoC architecture

  • Good written and verbal communication skills

  • Knowledge of high performance, high efficiency design

  • For recent PhD - research in memory subsystem analysis and architecture

  • Experience with the Android Ecosystem and analysis tools

  • Experience with Arm Architecture and ecosystem

Compensation for this role will vary among specific regions due to geographic differentials in the labor market, actual pay will be determined considering factors such as relevant skills and experience, and comparisons to other employees in the role. However, compensation in the following regions is expected to be as follows:

Colorado: Compensation is expected to be between $144.345 to $223,735

NYC: Compensation is expected to be between $144.345 to $223,735

Washington State: Compensation is expected to be between $166,024 to $257,366

California: Compensation is expected to be between $166,024 to $257,366

Regular full-time employees (salaried or hourly) have access to benefits including: medical, dental, vision, life insurance, 401(k), free onsite lunch, employee purchase program, tuition assistance (after 6 months), paid time off, student loan program, wellness incentives, and many more. In addition, regular full-time employees (salaried or hourly) are eligible for MBO bonus compensation, based on company, division, and individual performance.

#SARC

#ACL

*This position requires the ability to access information subject to U.S. export control restrictions. Applicants must have the ability to access export controlled information or be eligible to receive a government authorization to access export-controlled information

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Samsung Electronics is a global leader in technology, opening new possibilities for people everywhere. Through relentless innovation and discovery, we are transforming the worlds of TVs, smartphones, wearable devices, tablets, digital appliances, and network systems, and the entire semiconductor industry with our memory, system LSI, foundry, and LED solutions. Samsung is also leading in the development of the Internet of Things through, among others, our Smart Home and Digital Health initiatives.

Since being established in 1969 , Samsung Electronics has grown into one of the world’s leading technology companies, and become recognized as one of the top global brands. Our network now extends across the world, and Samsung takes great pride in the creativity and diversity of its talented people, who drive our growth. To discover more, please visit our official newsroom at ( https://news.samsung.com/global/ ).

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