Job Information
Power Integrations Senior Test Engineer in San Jose, California
Job Description
Designs, develops and implements cost-effective methods of testing and troubleshooting analog and mixed-signal power management semiconductor products.
Responsible for developing test solutions for wafer sort and final test.
Prepares test and diagnostic programs, designs test fixtures and equipment and completes the required specifications and procedures for new product development.
Work with design/DFT/product engineering teams to define ATE test strategy and specifications.
Work with manufacturing sites to ensure a smooth production ramp, sustaining and continuous improvement of production test.
Experience:
A minimum of 5 years of semiconductor Test Engineering experience with analog-mixed signal products, DFT and test plan responsibility, production support, and new product introduction experience.
Knowledge of C/C++ is required.
Extensive Teradyne Eagle ETS-88 or ETS-364 experience.
Ability to work within a cross functional development team
Strong test development and debug skills on ETS-88 or ETS-364 ATE platform.
Proficient with schematic and hardware design
Power Integrations is committed to building teams that drive innovation and therefore review a range of factors when determining compensation. The annual base pay range for this position is $114,474- $168,596. Our salary ranges are determined by role, level, qualifications and work location.
The range displayed on the job posting reflects the minimum and maximum target for new hire salaries for this position in California. Within the range, individual pay is determined by additional factors, including job-related skills, experience, and relevant education or training.
Power Integrations also offers to our eligible employees a comprehensive total rewards package that includes equity, medical benefits, ESPP, 401K, tuition reimbursement and time off programs. https://www.power.com/company/our-sustainability-priorities/people-our-engine-innovation