Experience Inc. Jobs

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is driving Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate, high-energy engineer to help achieve that mission.

As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the Semi-custom and Central IP Silicon (SCIPS) team is instrumental in architecting, designing, and delivering industry leading silicon solutions to enable cutting-edge Microsoft cloud hardware for Artificial Intelligence, Compute, and Datacenter SoCs.

We are looking for an Front-End Design Engineer to join the team.

Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.

In alignment with our Microsoft values, we are committed to cultivating an inclusive work environment for all employees to positively impact our culture every day.

Responsibilities

• Microarchitecture and front-end designforInterface and other mixed-signal IPs and related test-chips to meet tight power and performance requirements.

• Develop constraints, power intent, synthesis, and static checks.

• Develop basic test benches, support verification, Design For Test (DFT)and post silicon validation activities of the products working with verification and product teams.

• Collaborate effectively with architects, analog mixed-signal designers, verification engineers, physical design and DFT teams and other front-end designers.

• Align development methodologies with wider teams and drive continuous improvement to the RTL development processes for at scale execution.

Embody our Culture (https://www.microsoft.com/en-us/about/corporate-values) and Values (https://careers.microsoft.com/us/en/culture)

Qualifications

Required/Minimum Qualifications:

· 7+ years of related technical engineering experience

o OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience

o OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience or internship experience

o OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.

5+ years of experience in front-end design.

5+ years of design and productization experience of Application Specific Integrated Circuits (ASIC) / Interconnect IPs

5+ years of experience in mixed-signal design.

Other Requirements:

Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to the following specialized security screenings:

• *Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter. *

Preferred Qualifications:

• Proficient in RTL design and front-end methodologies

• Experience with automation using scripts PERL, Python etc.

• Knowledge of front-end tools, clock domain crossing (CDC) checkers, lint etc.

• Solid understanding of synthesis, static timing checks, DFT

Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $112,000 - $218,400 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $145,800 - $238,600 per year.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here: https://careers.microsoft.com/us/en/us-corporate-pay

Microsoft will accept applications for the role until May 3, 2024.

#azurehwjobs #Cobalt #MAIA

Microsoft is an equal opportunity employer. Consistent with applicable law, all qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations (https://careers.microsoft.com/v2/global/en/accessibility.html) .