Lightmatter Design Verification Engineer (Bay Area) in Mountain View, California
Design Verification Engineer
Lightmatter builds chips for artificial intelligence computing. Our architecture leverages unique properties of light to enable fast and efficient inference and training engines. If you're a collaborative engineer or scientist who has a passion for innovation, solving challenging technical problems and doing impactful work like building the world's first optical computers, consider joining the team at Lightmatter!
This presents an exceptional chance for a Design Verification engineer. In this role, you will collaborate closely with digital designers to comprehend their designs and employ UVM testbench techniques to verify them. Additionally, you'll be collaborating with photonic and analog designers, understanding their designs, utilizing Real Number Modeling (RNM) along with AMS verification methods to validate their work, and integrate the models into the UVM testbench.
Furthermore, you'll engage with the Architecture team to gain insight into system requirements and conduct performance verification. In essence, this opportunity will enable you to expand your expertise in UVM, AMS modeling, mixed-signal verification, formal verification, emulation, as well as performance modeling and verification.
Collaborate closely with digital, photonics, and analog designers to gain a thorough understanding of their designs and formulate comprehensive test plans for verifying their work.
Create UVM test benches for subsystem-level verification and provide support for full-chip verification. Debug test benches, identify and address issues, achieve high coverage, and ultimately sign off on Design Verification (DV).
Develop Real Number Models (RNM) for photonics and analog Intellectual Properties (IPs) and conduct AMS verification to ensure accurate model representation. Integrate the RNM models seamlessly into the UVM test bench.
Play a key role in the development of the Golden Reference Model (GRM) for design verification and actively participate in running emulations and formal verification for DV purposes.
Bachelor's degree or higher in Electrical or Computer Engineering (or other related fields)
3+ years of design verification experience
Proficiency in Hardware Description Languages (HDL) such as System Verilog
Knowledge of verification methodologies such as UVM or OVM
Proficiency in using simulation tools like Xcelium, ModelSim, Questa, or VCS
Strong problem-solving skills to identify and resolve issues in the design
Fluency in English, both written and verbal
Ability to work with diverse teams of engineers and scientists
Experience with Scripting Languages (perl or python)
Experience with AMS verification
Experience in formal verification
Comprehensive Health Care Plan (Medical, Dental & Vision)
Life Insurance (Basic, Voluntary & AD&D)
Generous Time Off (Vacation, Sick & Public Holidays)
Paid Family Leave
Short Term & Long Term Disability
Training & Development
Flexible, hybrid workplace model
Stock Option Plan
Base Compensation Range: $135,000.00 - $160,000.00. In accordance with the Colorado, California and New York law, the range provided is Lightmatter's reasonable estimate of the compensation for this role. Actual pay will be based on several factors including work experience, location and education.
Lightmatter recruits, employs, trains, compensates and promotes regardless of race, religion, color, national origin, sex, disability, age, veteran status, and other protected status as required by applicable law.