Apple Wireless PHY RTL Design Engineer in Cupertino, California
Wireless PHY RTL Design Engineer
Santa Clara Valley (Cupertino),California,United States
We'd like you to have:-
5+ years of hands-on experience data path RTL design experience
strong fixed-point knowledge and extensive experience with bit true verifications
understanding of DSP communication algorithms and tradeoffs between performance, complexity, and power
good knowledge of modern design techniques and low power logic design
track record of bringing logic designs into mass production
ability to work collaboratively with others and be productive under aggressive schedules
excellent communication skills and self-motived
In this role you will be: writing specifications and other documents based on MATLAB/C system model, Microarchitecture definition RTL logic design, Bit true verification support Running tools to ensure lint-free and CDC clean design Collaboration with algorithm and software team to ensure performance and power efficiency
Education & Experience
BS required, MSEE/PhD preferred
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