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Google Logic Design Engineer, Networking, Google Cloud in Bengaluru, India

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering or equivalent practical experience

  • 8 years of experience in ASIC development with Verilog, SystemVerilog, VHDL, or Chisel

  • Experience with ASIC design verification, synthesis, timing analysis, power analysis, and design for testing (DFT)

  • Experience in 5 SOC cycles

Preferred qualifications:

  • Experience designing hardware offloads for high throughput, low latency, reliability, and security

  • Experience estimating performance by analysis, modeling, and network simulation

  • Experience working with Software teams optimizing the hardware/software interface

  • Experience using a procedural programming language (e.g., C++, Python, Go)

  • Knowledge of PCIe and DRAM in networking end points, Network on Chip (NoC) principles, and protocols (e.g., AXI, ACE, and CHI)

  • Understanding of queueing, Quality of Service (QoS), and packet routing for networking and RDMA

Our computational challenges are so unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

  • Acquire a complex networking ASIC subsystem, and understand how it interacts with software and other ASIC subsystems to implement data center networks.

  • Define high-performance hardware/software interfaces. Write micro-architecture and design specifications.

  • Implement designs in SystemVerilog.

  • Collaborate closely with software, verification, and physical design stakeholders to ensure the designs are complete, correct, and performant.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also https://careers.google.com/eeo/ and https://careers.google.com/jobs/dist/legal/OFCCPEEOPost.pdf If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: https://goo.gl/forms/aBt6Pu71i1kzpLHe2.